11:12Machine-translated from Azerbaijani by AIRead in Azerbaijani
Tesla Unveils Plans for SI5 and SI6 AI Chips

Tesla has unveiled an updated roadmap for the accelerator chips it is developing for artificial intelligence computing. The company has switched from AI in its naming to the abbreviation SI, which stands for “super intelligence.” The chip previously known as “HW4” and “AI4” is now called “SI4.” The next generations will be called “SI5” and “SI6.” Elon Musk has confirmed that the name “SpaceXAI” will also be changed to “SpaceXSI.”
According to the roadmap, the “SI6” is expected to be ready in 2029-2030. The chip will deliver 80 times the computing power of the current “SI4” and will have 144 GB of memory. “Samsung Foundry” will manufacture it using 2 nm process technology. The agreement between the parties will remain in effect through the end of 2033.
The “SI5” will be released before the “SI6.” This chip is expected to be 40 times more powerful than the “SI4” and operate with 96 GB of memory. “TSMC” will manufacture part of it using 3 nm technology, while “Samsung Foundry” will manufacture the rest using 2 nm technology. The “SI5” will combine several smaller chips in a single package. Power consumption will range from 250-800 W, depending on the workload.
The “SI4,” which serves as the basis for comparison, is currently used in “Tesla” vehicles. Previously called “HW4” and “AI4,” this chip is manufactured by “Samsung Foundry” using 7 nm technology. The model has approximately 16 GB of GDDR6 memory. “Tesla” has not disclosed its official computing power. Therefore, the operations-per-second figures given for the “SI5” and “SI6” are not exact results but estimates based on available information.
The updated roadmap also shows the return of the artificial intelligence training chip called “Dojo D3.” “Tesla” is abandoning the previous architecture. That system was based on high-speed SRAM memory inside the chip and an entire silicon wafer. In the “Dojo D3,” several smaller chips will be combined using 2.5D and 3D methods, and HBM memory will be used for fast data transfer. According to the company, the chip will be adapted to operate in space, train artificial intelligence models, and scale the system. Its computing power, memory capacity, manufacturing technology, and release date have not yet been disclosed.
